1) Field of the Invention
This invention relates generally to the fabrication of semiconductor devices using ultrasound and more particularly to a method for electroplating, depositing, or annealing substrates to fill or line contact/via holes while ultrasonically vibrating the substrate.
2) Description of the Prior Art
ULSI circuits are now on the submicron stage of fabrication. Conventional chemical vapor deposition and physical vapor deposition (PVD) processes for depositing metal wiring films suffer from unsatisfactory step coverage with respect to vertical contact hole having a diameter less than 0.5 .mu.m and a high aspect ratio. There is a need for improved deposition and annealing techniques to improve the coverage of films in small diameter and high aspect holes.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering U.S. Pat. No. 5,219,790(Miyatake) discloses a process of annealing Al using an ultrasound. U.S. Pat. No. 5,290,733(Hayasaka et al.) discloses a method for plating metal (Al). U.S. Pat. No. 5,425,965(Tasmor et al.) discloses a method for forming polycrystalline diamonds using ultrasound. U.S. Pat. No. 5,275,714(Bonnet et al.) shows an ultrasonic process in a electrolytic deposition. U.S. Pat. No. 5,270,252(Papanicolaon) shows a photoresist removal wet step using ultrasound.
However, these processes can be further improved.